Design Verification Engineers (A879)

As a Design Verification Engineer, you will be responsible for designing, implementing, and operating verification environments to identify potential design flaws before they become issues. Your role will ensure the flawless functionality and performance of systems in a fast-paced startup environment, offering opportunities for professional growth and career advancement.

• Bachelor’s or Master’s degree in Electrical Engineering or Computer Science
• Minimum 4 years of experience in Design Verification
• Knowledge of SystemVerilog and UVM
• Ability to identify what can go wrong even when others feel safe
• Ability to adapt to a fast-paced startup environment
• Experience with verification environments and tools architecture
• Knowledge of processor architecure, GPUs or vector processing engines architecture, cache coherency protocols
• Experience with test planning, formal verification, and debugging
• Working on FPGA emulated platforms
• Proficient with Linux, using the scripting language ( Perl or Python),  C/C++, and TCL andExpect

• Competitive salary and package
• Opportunities for professional development
• International environment and career progression
• Access to cutting-edge technology
• Collaborative and supportive work environment